1. Field of the Invention
The present invention relates to a method for manufacturing a conductive element using a thin film silicon which is to be incorporated in a semiconductor device.
2. Description of the Prior Art
Needless to say, may diverse impurity-containing silicon thin films are used in a semiconductor device. In a recently found device, the impurity-containing silicon film for use in a gate electrode of a MOS transistor has a tendency to be gradually become thinner so as not to leave a step or the like in a subsequent process.
Heretofore, a method for forming the silicon thin film doped with the impurity has been accomplished by three main methods. Each of the methods will be described below.
In a first method, a non-doped polycrystalline silicon film is formed on an insulating film such as a silicon oxide film disposed in a predetermined position on a silicon substrate. In the method for forming the polycrystalline silicon film, 200 scm of SiH.sub.4 gas is normally introduced under a reduced pressure of 0.2 torr at 620.degree. C. so as to perform a processing, thereby ending the formation of the polycrystalline silicon film. If the film formation is carried out for about ten minutes allows a polycrystalline silicon film of 100 nm thick is obtained. Next, the film is removed from a film forming device, and a phosphorus oxytrichloride gas is then introduced at 850.degree. C. A heat treatment is performed for thirty minutes so as to introduce the impurity phosphorus. Since a phosphorus glass layer in the order of 30 nm thick, is formed on the surface of the non-doped polycrystalline silicon, the phosphorus glass is removed by means of a diluted hydrofluoric acid or the like.
In a manner as described above, the silicon film of 100 nm thick can be formed which is doped with the impurity having a phosphorus concentration of 5E20 atoms/cm.sup.3 (5.times.10.sup.20 atoms/cm.sup.3). This prior art is referred to as a phosphorus diffusing method. The method is a doping method causing a solid phase diffusion from the phosphorus glass layer into the polycrystalline silicon. The use of these conditions allows the achievement of the silicon thin film doped with phosphorus having a sheet resistance value of 300 .OMEGA./sq. (a resistivity of 3E-5.OMEGA..multidot.m, that is, 3.times.10.sup.-5 .OMEGA..multidot.m).
In a second method, by the use of the conditions as with the above-described method, the polycrystalline silicon film of 100 nm thickness is formed on the insulating film such as the silicon oxide film. An ion implantation technique is then used so as to implant the impurity such as the phosphorus at an accelerating energy of about 20-30 keV for an area density of 5E15 atoms/cm.sup.2. In a manner as described above, the polycrystalline silicon film is doped with the impurity of 5E20 atoms/cm.sup.3.
After the ion implantation, and in order to prevent the impurity from being eliminated from the film, the silicon oxide film or the like is formed to a thickness of the order of 50 nm. The heat treatment is then performed for about thirty minutes at 850.degree. C. or more under a nitrogen atmosphere. After the heat treatment, the previously formed silicon oxide film is removed by the use of the diluted hydrofluoric acid or the like.
The heat treatment causes the introduced impurity ion to be activated. It is possible to obtain the silicon thin film doped with phosphorus having the sheet resistance value of about 200 .OMEGA./sq. (the resistivity of 2E-5 .OMEGA..multidot.m).
In a third method, after the formation of an amorphous impurity-containing silicon film, the heat treatment is performed. In this method, the silicon substrate, which has the insulating film such as an oxide film formed in a predetermined position, is exposed at 530 .degree. C. under the 1-torr atmosphere at flow rates of 1 SLM of silane gas (100%) and 0.2 SLM of phosphine gas (diluted with 1% nitrogen) so as to be obtained. Under these conditions, the amorphous silicon film doped with phosphorus having the phosphorus concentration of about 5E20 atoms/cm.sup.3 (5.times.10.sup.20 atoms/cm.sup.3) can be formed to a thickness of about 100 nm.
An atmospheric CVD method or the like is then used, so that the silicon oxide film in the order of 10 nm thick is formed on the surface of the amorphous silicon film. The heat treatment is performed for thirty minutes or more at 800 .degree. C., thereby causing a crystallization resulting in an electrical activation. Finally, the silicon oxide film, which is previously formed on the surface of the amorphous silicon film, is etched by the use of the diluted hydrofluoric acid or the like.
The formed silicon film doped with phosphorus can be the silicon film doped with phosphorus having the sheet resistance value of about 120 .OMEGA./sq. (the resistivity of 1.2E-5 .OMEGA..multidot.m).
For each of the impurity-containing silicon films formed by the above three methods, a predetermined patterning is performed in the subsequent process by means of a lithography technique and an etching technique. A conductive element is then formed.
On the other hand, the typical conductive element using the silicon thin film is, for example, the gate electrode of the MOS transistor. A recent multi-layer and high-integration of the device, uses the process of forming the element deposited on the gate electrode. When a large step is formed, the patterning using the lithography technique becomes difficult. Thus, there has been a problem that an excellent processing accuracy cannot be obtained.
Therefore, a film thickness of the gate electrode is required to be as thin as possible so as to reduce the remaining step in the subsequent process. However, the film of the gate electrode is thinned, thereby resulting in the essential increase of an element resistance. As a result, there has been another problem that an operating velocity of the transistor itself is reduced.
Accordingly, a material for the gate electrode requires the silicon film to have the lowest resistivity possible. As described above, the conductive element, which is obtained by the heat treatment of the amorphous silicon doped with phosphorus, can obtain the lowest resistivity value. In addition, the process can be performed at as low a temperature as at most about 800.degree. C. Accordingly recently, this has been a mainstream method for manufacturing a silicon thin film conductive element such as the gate electrode.
As described above, recently, the conductive element using the silicon thin film has further required the formation of a thin film and the reduction of its resistance. However, when the film thickness is 100 nm or less, there has been a still another problem because the resistivity of the impurity-containing silicon film is quickly increased.
FIG. 1 shows a relationship between the film thickness and the resistivity of the prior-art silicon thin film. FIG. 1 shows the relationship between the film thickness and the resistivity at the phosphorus concentration of 3E20 atoms/cm.sup.3 (3.times.10.sup.20 atoms/cm.sup.3).
The method for manufacturing the impurity-containing silicon thin film shown in FIG. 1 is the third method. That is, the amorphous silicon film is doped with phosphorus. Then, the heat treatment is performed at 800.degree. C. under the nitrogen atmosphere. As seen from the drawing, when the film thickness is 150 nm or more, the resistivity is stabilized at the low value of 1E-5 .OMEGA..multidot.m or less. On the other hand, when the film thickness is 100 nm or less, the resistivity is rapidly increased. When the film thickness is reduced to 50 nm, the resistivity is increased up to 3E-5 .OMEGA..multidot.m. For example, the reduction-by-half of the film thickness results in the increase of the resistivity by three times. That is, this means that even the conductive element having the same designed width has the six times resistivity. This is a serious problem resulting from the reduction of film thickness of the silicon conductive element.
FIG. 2 shows the relationship between the film thickness and a reciprocal of the sheet resistance in the prior-art silicon thin film. FIG. 2 illustrates the increase of the resistivity of the silicon thin film. In FIG. 2, there are plotted the film thickness and the reciprocal of the sheet resistance of the silicon films doped with phosphorus, one film having the phosphorus concentration of 3E20 atoms/cm.sup.3 (3.times.10.sup.20 atoms/cm.sup.3) and the other having the concentration that of 1.5E20 atoms/cm.sup.3 (1.5.times.10.sup.20 atoms/cm.sup.3).
In case of an ideal bulk of sample, the plot should be a straight line passing through an origin. However, in case of the silicon film doped with phosphorus, the plot deviates off a linearity at the position where the film thickness is less than about 100 nm. When the film thickness is thicker, the plot is substantially straight, but it does not pass through the origin. The reciprocal of the sheet resistance is zero, that is, the sheet resistance reaches an infinity at the film thickness of about 80 nm in the film having the phosphorus concentration of 1.5E20 atoms/cm.sup.3 (1.5.times.10.sup.20 atoms/cm.sup.3) and at the film thickness of about 30-40 nm in the film having the phosphorus concentration of 3E20 atoms/cm.sup.3 (3.times.10.sup.20 atoms/cm.sup.3).
The number of surface sites of a single-crystal silicon is about 1.3E15 atoms/cm.sup.2. When 100% of phosphorus in the phosphorus concentration of 3E20 atoms/cm.sup.3 is trapped in an interface, the phosphorus is completely trapped to a thickness of about 43 nm. Therefore, with regard to the resistance of the thin film of 100 nm or less thick, an influence of the substantially non-doped layer due to the trap in the interface is not negligible.
Measures against the increase of resistance in the thin film, are disclosed in Japanese Patent Application Laid-open No. 6-314661/1994. There has been the method that the film is doped with the impurity having the high concentration which ranges from about 5E20 atoms/cm.sup.3 to 2.5E21 atoms/cm.sup.3. An object of this method is to reduce the thickness of the layer which is trapped in the interface by increasing the impurity in the bulk so as to be substantially non-doped. In the thin film, the object is to introduce a supersaturated impurity in such a manner. In the thin film, such an introduction of the supersaturated impurity allows the increase of the resistivity to be suppressed.
However, with a consideration of an application of the impurity-containing silicon conductive element to the device, the method of doping with the supersaturated impurity has the problem that the impurity is diffused through the peripheral portion thereof in the subsequent heat treatment.
For example, when the silicon film doped with the supersaturated impurity up to 2E21 atoms/cm.sup.3 (2.times.10.sup.21 atoms/cm.sup.3) is applied to the gate electrode, a large amount of impurity is diffused from the gate electrode to a gate insulating film during the heat treatment for the activation of the impurity. Therefore, there is the problem that reliability of the gate insulating film is considerably deteriorated. Thus, a simple high-concentration doping method cannot be applied to an actual device. Accordingly, the silicon film is required to be the silicon film which maintains the impurity concentration of a constant value or less while having the low resistance.
FIG. 3 is a graph showing the relationship among the phosphorus concentration, a fraction defective of pressure resistance and the resistivity of the MOS transistor using a thin film silicon gate, showing the problems of the prior art.
In an MOS transistor (FIG. 3), the relationship is shown between the phosphorus concentration and the resistivity of the gate electrode using the silicon doped with phosphorus and a B-mode fraction defective of insulation pressure resistance of the gate insulating film. A B-mode defective, is defined as a reference in which a field strength applied to the insulating film ranges from 2 MV/cm to 8 MV/cm and there is a current of 1 mA/cm.sup.2 or more.
The film thickness of the silicon film doped with phosphorus which is to be the electrode is set to 100 nm. The film thickness of the gate insulating film is set to 10 nm. When the phosphorus concentration in the gate electrode is higher than 2E20 atoms/cm.sup.3 (2.times.10.sup.20 atoms/cm.sup.3), the resistivity of the silicon film doped with phosphorus wchich is to be the gate electrode is 2E-5(2.times.10.sup.31 5) .OMEGA..multidot.m or less. This value is low and preferable.
However, it is appreciated that the fraction defective of pressure resistance of the gate insulating film is increased. On the contrary, when the phosphorus concentration is suppressed below 2E20 atoms/cm.sup.3, the increase of the defective of pressure resistance can be suppressed. However, the resistivity is increased. In the gate electrode using such a silicon doped with phosphorus, it is necessary to suppress the phosphorus concentration below 2E20 atoms/cm.sup.3 and to reduce the resistivity to 2E-5(2.times.10.sup.31 5) .OMEGA..multidot.m or less.